[转载]NDS 的内存映射表 （A）

杜若

用DevkitARM9 可以编译NDS的程序

// Memory
#define ICTM_START0x01ff8000
#define ICTM_END0x01ffffff

#define IRAM_START0x02000000
#define IRAM_END0x02400000

#define WRAM_START0x037f8000
#define WRAM_END0x037fffff

#define IOREG_START0x04000000
#define IOREG_END0x05000000

#define PAL_BG_START0x05000000
#define PAL_BG_END0x05000200

#define PAL_OBJ_START0x05000200
#define PAL_OBJ_END0x05000400

#define PAL_DB_BG_START0x05000400
#define PAL_DB_BG_END0x05000600

#define PAL_DB_OBJ_START0x05000600
#define PAL_DB_OBJ_END0x05000600

#define VRAM_BG_START0x06000000
#define VRAM_BG_END0x06080000

#define VRAM_DB_BG_START0x06200000
#define VRAM_DB_BG_END0x06220000

#define VRAM_OBJ_START0x06400000
#define VRAM_OBJ_END0x06440000

#define VRAM_DB_OBJ_START0x06600000
#define VRAM_DB_OBJ_END0x06620000

#define VRAM_LCDC_START0x06800000
#define VRAM_LCDC_END0x068A0000

#define OAM_START0x07000000
#define OAM_END0x07000400

#define DB_OAM_START0x07000400
#define DB_OAM_END0x07000800

#define ROM_BANK_START0x08000000
#define ROM_BANK_END0x0A000000

#define RAM_BANK_START0x0A000000
#define RAM_BANK_END0x0A010000

#define BIOS_START0xFFFF0000
#define BIOS_END0xFFFF8000

// Types
typedef unsigned charu8;
typedef unsigned shortu16;
typedef unsigned longu32;

struct NDSReal
{
u16 dec:8;//小数位
u16 Integer:7;//整数位
u16 Sign;//符号位
};

struct NDSRGB
{
u16r:5;
u16 g:5;
u16 b:5;
u16 a:1;
};

struct NDSMatrix4x4
{
NDSReal m[4][4];
};

struct NDSMatrix4x3
{
NDSReal m[4][3];
};

struct NDSMatrix3x3
{
NDSReal m[3][3];
};

struct NDSHWVector
{
u32 nx:9;
u32 sx:1;
u32 ny:9;
u32 sy:1;
u32 nz:9;
u32 sz:1;
u32 dummy:2;
};

typedef NDSVector10;
struct NDSVector
{
NDSReal x;
NDSReal y;
NDSReal z;
};

struct NDSVector2
{
NDSReal x;
NDSReal y;
};


// IO REG

#define IOREG_DISPCNT_CNT(IOREG_START+ 0x0000)

struct sDispCnt
{
u32 BgMode:3;
u32 bBg0Is3D:1;// if 0 bg0 is 2D
u32 ObjMap:1;// 0 = 2D ; 1 = 1D
u32 ObjMap_Bm:2;
u32 BLANK:1;

u32 Display:4;//Display
u32 W0:1;
u32 W1:1;
u32 OW:1;
u32 Mode:2;
u32 Vram:2;
u32 ExObj:3;//EX OBJ
u32 OH:1;
u32 BgCharOffset:3;//BG CharOffset
u32 BgScreenOffset:3;
u32 BG:1;
u32 Zer1;
};

#define IOREG_DISPSTAT_CNT (IOREG_START + 0x0004)

struct sDispStat
{
u16 VBlank:1;
u16 HBlank:1;
u16 Lyc:1;
u16 Vbi:1;
u16 Hbi:1;
u16 Vqi:1;
u16 zer1;
u16 VCounter:9;
};


#define IOREG_BG0CNT(IOREG_START + 0x0008)
#define IOREG_BG1CNT(IOREG_START + 0x000a)
#define IOREG_BG2CNT(IOREG_START + 0x000c)
#define IOREG_BG3CNT(IOREG_START + 0x000e)


struct sBgCnt
{
u16 Priority:2;
u16 CharBase:4;
u16 Mosaic:1;
u16 ColorMode:1;
u16 ScreenBase:5;
u16 BgPalSlot:1;
u16 ScreenSize:2;
};

#define IOREG_BG0OFS(IOREG_START + 0x0010)
#define IOREG_BG1OFS(IOREG_START + 0x0014)
#define IOREG_BG2OFS(IOREG_START + 0x0018)
#define IOREG_BG3OFS(IOREG_START + 0x001c)

struct sBgOfs
{
u16vofs:8;
u16 Dummy1:8;
u16hofs:8;
u16 Dummy2:8;
};


#define IOREG_BG2AFFINE(IOREG_START + 0x0020)

#define IOREG_BG3AFFINE(IOREG_START + 0x0030)

struct sBgAffine
{
NDSRealpa;//020h
NDSRealpb;//022h
NDSRealpc;//024h
NDSRealpd;//026h
NDSReal x;//028h
NDSReal y;//02ch
};

#define IOREG_WINDOW0(IOREG_START + 0x40)
#define IOREG_WINDOW1(IOREG_START + 0x40)

struct sWin
{
u16 right:8;
u16 left:8;
u16down:8;
u16 up:8;
};

#define IOREG_WININ(IOREG_START + 0x48)
#define IOREG_WINOUT(IOREG_START + 0x4A)

struct sWinIn
{
u16 Win0In:6;
u16 Dummy:2;
u16 Win1In:6;
};


struct sWinOut
{
u16 WinOut:6;
u16 Dummy:2;
u16 ObjWinIn:5;
};

#define IOREG_MOSAIC(IOREG_START + 0x004c)

struct sMosic
{
u16 BgHsize:4;
u16 BgVsize:4;
u16 ObjHsize:4;
u16 ObjVsize:4;
};

#define IOREG_BLDCNT(IOREG_START + 0x0050)

struct sBldCnt
{
u16 Plane1:6;
u16 Effect:2;
u16 Plane2:6;
u16 Dummy:2;
};

#define IOREG_BLDALPHA(IOREG_START + 0x0052)

struct sBldAlpha
{
u16 eva:5;
u16 dummy1:3;
u16 evb:5;
u16 dummy2:3;
};

#define IOREG_BLDY(IOREG_START + 0x0054)

struct sBldY
{
u16 dummy1:8;
u16 evy:5;
u16 dummy2:3;
};

#define IOREG_DISP3DCNT(IOREG_START + 0x0060)

struct sDisp3dCnt
{
u16 Tme:1;
u16 Ths:1;
u16 Ate:1;
u16 Abe:1;
u16 Aae:1;
u16 Eme:1;
u16 Fmod:1;
u16 Fme:1;
u16 FogShift:4;
u16 R1;
u16 G1;
u16 Priority:1;
u16 dummy:1;
};

#define IOREG_SIODATA32(IOREG_START + 0x0120)

struct sSioData32
{
u16 L_Shift;
};

#define IOREG_SIOCNT(IOREG_START + 0x0128)
struct sSioCnt
{
u16 dummy1:2;
u16 TRecv:1;
u16 TSend:1;
u16 dymmy2:12;
};

#define IOREG_SIOSEL(IOREG_START + 0x012c)
struct sSioSel
{
u16 Sel:1;
u16 dummy:15;
};


#define IOREG_DIVCNT(IOREG_START + 0x0280)
struct sDivCnt
{
u16 Mode:2;
u16 Dummy:11;
u16 Div0:1;
u16 dummy1:2;
};

#define IOREG_DIVNUMBER(IOREG_START + 0x0290)
struct sDivNumber
{
u32 _L;
u32 _H;
};

#define IOREG_DIVREMON(IOREG_START + 0x0298)
struct sDivRenom
{
u32 _L;
u32 _H;
};

#define IOREG_DIVRESULT(IOREG_START + 0x02A0)
struct sDivResult
{
u32 _L;
u32 _H;
};

#define IOREG_DIVREMRESULT(IOREG_START + 0x02A8)
struct sDivRemResult
{
u32 _L;
u32 _H;
};

#define IOREG_SQRTCNT(IOREG_START + 0X02B0)
struct sSqrtCnt
{
u16 Mode:1;
u16 dummy:14;
u16 Busy:1;
};

#define IOREG_SQRTRESULT(IOREG_START + 0X02B4)
struct sSqrtResult
{
u32Data;
};

#define IOREG_SQRTPARAM(IOREG_START + 0X02B8)
struct sSqrtParam
{
u32 _L;
u32 _H;
};


#define IOREG_RDLINE_COUNT(IOREG_START + 0x0320)
struct sRdLineCount
{
u16 num:6;
};

#define IOREG_EDGE_COLOR(IOREG_START + 0x0330)
struct sEdgeColor
{
NDSRGB Color[8];
};

#define IOREG_ALPHA_TEST_REF(IOREG_START + 0x0340)
struct sAlphaTestRef
{
u16 alpha:5;
u16 dummy:11;
};

#define IOREG_CLEAR_COLOR(IOREG_START + 0x0350)
struct sClearColor
{
u16 PolyGonId:8;
u16 dummy:3;
u16 Alpha:5;
NDSRGB color;
};

#define IOREG_CLEAR_DEPTH(IOREG_START + 0x0354)
struct sClearDepth
{
u16 OffsetX:8;
u16 OffsetY:8;
};

#define IOREG_FOG_COLOR(IOREG_START + 0x0358)
struct sFogColor
{
NDSRGB color;
};

#define IOREG_FOG_OFFSET(IOREG_START + 0x035c)
struct sFogOffset
{
u16 FogOffset:15;
u16 dummy:1;
};

#define IOREG_FOG_TABLE(IOREG_START + 0x0360)
struct sFogTable
{
u8 Density[32];//低7位有效
};

#define IOREG_TOON_TABLE(IOREG_START + 0x0380)
struct sToonTable
{
NDSRGB color[32];
};

#define IOREG_GXFIFO(IOREG_START + 0x0400)


#define IOREG_MTX_MODE(IOREG_START + 0x0440)
struct sMtxMode
{
u16 mode:2;
u16 dummy:14;
};

// Matrix 计算器

#define IOREG_MTX_PUSH(IOREG_START + 0x0440)
#define IOREG_MTX_POP(IOREG_START + 0x0444)
struct sMtxPop
{
u16 Integer:5;
u16 Sign:1;
u16 Dummy:10;
};

#define IOREG_MTX_STORE(IOREG_START + 0x04cc)
#define IOREG_MTX_RESTORE(IOREG_START + 0x0450)
#define IOREG_MTX_IDENTITY(IOREG_START + 0x0454)

struct sMtxStore
{
u16 Index:5;
};

#define IOREG_MTX_LOAD_4x4(IOREG_START + 0x0458)
#define IOREG_MTX_LOAD_4x3(IOREG_START + 0x045c)
#define IOREG_MTX_MUL_4x4(IOREG_START + 0x0460)
#define IOREG_MTX_MUL_4x3(IOREG_START + 0x0464)
#define IOREG_MTX_MUL_3x3(IOREG_START + 0x0468)
#define IOREG_MTX_SCALE(IOREG_START + 0x0468)
#define IOREG_MTX_TRANS(IOREG_START + 0x0470)
typedef NDSRealTIoRegMtx;


#define IOREG_COLOR(IOREG_START + 0x0480)
#define IOREG_NORMAL(IOREG_START + 0x0484)
typedef NDSHWVector TIoRegNormal;

#define IOREG_TEXCOORD(IOREG_START + 0x0488)
#define IOREG_VTX_16(IOREG_START + 0x048c)
struct sVtx16
{
NDSReal u;
NDSReal v;
};

#define IOREG_VTX_10(IOREG_START + 0x0490)
typedef NDSVector10sVtx10;

#define IOREG_VTX(IOREG_START + 0x0494)
struct sVTX
{
NDSVector2 xy;
NDSVector2 xz;
NDSVector2 yz;
};

#define IOREG_VTX_DIFF(IOREG_START + 0x04A0)
typedef NDSVector10sVtxDiff;


#define IOREG_POLYGON_ATTR(IOREG_START + 0x04A4)
struct sPolygonAttr
{
u32 le:4;
u32 pm:2;
u32 bk:1;
u32 fr:1;
u32 dummy:3;
u32 xl:1;
u32 fc:1;
u32 d1:1;
u32 dt:1;
u32 fe:1;
u32 alpha:5;
u32 id:6;
};


                                                                                作者：HuangYZ