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发表于 2006-4-7 08:34:00
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这断代码用于以115200bps打开串口:
.include "f:\fishyuxuan\6502simulator\GGV\NC2600_head.65s"
open_port:
enable_pll
switch_bank 0
LDA #$01
STA LCReg
Disable_irda
clear_FIFO
JSR wait_io_ok
switch_BK 1
LDA #$01
STA BSReg
switch_BK 0
LDA #$00
STA MSReg
enable_UART
RTS
wait_io_ok:
JSR int_count
LDA #$00
STA $0FAA
local1: enable_UCE
switch_BK 0
LDA LCReg
CMP #$60
BEQ local2
JSR dec_count
BNE local1
LDA #$01
STA $0FAA
local2 RTS
int_count:
LDA #$00
STA $0FC9
LDA #$10
STA $0FCA
RTS
dec_count:
LDA $0FC9
BNE dec_local1
DEC $0FCA
dec_local1:
DEC $0FC9
LDA $0FCA
CMP #$00
BNE end_count
LDA $0FC9
CMP #$00
end_count: RTS
;---------------UART & GPIO------------------------
brui equ 3ah
uart_BK equ brui+3
RHReg equ brui
THReg equ brui
LSReg equ brui+1
LCReg equ brui+1
MCReg equ brui+2
IVReg equ brui+3
BSReg equ brui
IRCReg equ brui+1
MSReg equ brui+2
FCReg equ brui+3
CStop equ brui
CStart equ brui+1
TMReg equ brui+2
IEReg equ brui+3
GPCReg equ brui
P05 equ brui+2
;-----------------------------------------------;
P06 equ brui+2
P07 equ brui+3
P08 equ brui+4
P08Dir equ brui+4
P08IC equ brui+5
;---------------RTC SIF-------------------------
IndexAddrReg equ 3eh
RIReg equ IndexAddrReg
IndexDataReg equ 3fh
RTCVal equ IndexDataReg
RCReg0 equ IndexDataReg
RCReg1 equ IndexDataReg
;---------------常用I/O控制或状态位-------------------------
io_hiie_bit equ 10000000b ;ptype1
io_dir42_bit equ 10000000b ;ptype0
io_hoie_bit equ 01000000b ;ptype1
io_dir43_bit equ 01000000b ;ptype0
io_dir316_bit equ 00100000b
io_nmioff_bit equ 00010000b
io_exie0_bit equ 00001000b
io_exie1_bit equ 00000100b
io_tmBie_bit equ 00000010b
io_tmAie_bit equ 00000001b
io_dir423_bit equ 11000000b ;write protect
io_int_ibf_bit equ 10000000b
io_int_obf_bit equ 01000000b
io_int_tm1_bit equ 00100000b
io_int_tm0_bit equ 00010000b
io_int_tb_bit equ 00001000b
io_int_eint_bit equ 00000100b
io_int_tmB_bit equ 00000010b
io_int_tmA_bit equ 00000001b
io_lcd_diction equ 00010000b
io_lcd_enb_bit equ 00001000b ;mask DI
io_p4_4_7_dir equ 11010000b ;for port44-port47 out(io_port_config) wyj 2001.10.17
io_p407_dir_bit equ 10000000b ;for port47 out
io_p406_dir_bit equ 01000000b ;for port46 out
io_p405_dir_bit equ 00100000b ;for port45 out
io_p404_dir_bit equ 00010000b ;for port44 out
io_onen_bit equ 00000100b
io_ROA_bit equ 10000000b ;RAM/ROM (io_bios_bsw)
io_btd_bit equ 00100000b ;
io_p401_dir_bit equ 00010000b ;for port41 out (io_bios_bsw)
io_onoff_pad_bit equ 00000001b ;use p30, no dir set, as input
io_adi_bit equ 10000000b
io_rtcoff_bit equ 01000000b
io_bout_bit equ 00100000b
io_shdnz_bit equ 00001000b
io_save_bit equ 00000100b
io_vsl1_bit equ 00000010b
io_vsl0_bit equ 00000001b
io_sh_bit equ 00001000b
io_rec_bit equ 00001000b ;1 for rec 0 for speak
io_bcp_bit equ 00100000b ;1 generate NMI 低电压 (io_general_status)
io_lcdir0_bit equ 00000000b ;b4 (io_clock_ctrl)
io_lcdir1_bit equ 00000000b ;b0 (io_lcd_ctrl)
io_xtype_bit equ 00000111b ;XTYPE=7 (io_port_config)
io_xm0cf_bit equ 00001011b ;Vol=0,ROA=0,80h--0ffh
;io_xm1cf_bit equ 00011001b ;Vol=1,ROA=0,80h--0ffh nc880
io_xm1cf_bit equ 00000011b ;Vol=0,ROA=1,80h--0ffh nc2000
;---------------Uart 状态常量-------------------------
RxRDY equ 1
OE equ 2
PE equ 4
FE equ 8
TxRDY equ 32
TxEMT equ 64
switch_BK macro val
php
pha
lda uart_BK
and #0fch
ora #val
sta uart_BK
pla
plp
endm
;------------------------------------IrDA macro----------------
DISABLE_TBASE macro
pha
lda zp_general_ctrl
and #11110000b
sta io_general_ctrl
pla
endm
ENABLE_TBASE macro
pha
lda zp_general_ctrl
sta io_general_ctrl
pla
endm
as_primary macro
lda IrdaModeMark
and #0cfh
ora #10h
sta IrdaModeMark
endm
as_secondary macro
lda IrdaModeMark
and #0cfh
ora #20h
sta IrdaModeMark
endm
not_assign macro
lda IrdaModeMark
and #0cfh
sta IrdaModeMark
endm
set_simulation macro
lda FoundDevice
sta SimuMark
endm
set_PorF macro
ora #10h
endm
set_cmd macro
ora #1
endm
reset_watchdog macro
lda #0
sta watch_dog_timer_flag
endm
clear_idlesec macro
lda #0
sta idlesec
endm
check_key macro local,local1
lda key
and #80h
beq local
lda key
and #7fh
sta key
jmp local1
local: lda #0
local1:
endm
clear_length macro
lda #0
sta RecvLength
sta RecvLength+1
endm
set_recv_status macro
lda IrdaComStatus
and #0fh
ora #1
sta IrdaComStatus
endm
set_send_status macro
lda IrdaComStatus
and #0fh
ora #2
sta IrdaComStatus
endm
set_retry1 macro
lda #1
sta RetryCount
endm
set_retry macro
lda #5
sta RetryCount
reset_watchdog
endm
set_callmark macro val
lda #val
sta IrdaCallMark
endm
switch_bank macro val
lda uart_BK
and #0fch
ora #val
sta uart_BK
endm
Enable_Irda macro
lm IndexAddrReg,#P6DInx ;P64 output 0
lda zp_port6_dir
ora #10h
sta IndexDataReg
sta zp_port6_dir
lda zp_io_port6
and #11101111b
sta io_port6
sta zp_io_port6
endm
Disable_Irda macro
lm IndexAddrReg,#P6DInx
lda zp_port6_dir
ora #10h ;p64 output 1
sta IndexDataReg
sta zp_port6_dir
lda zp_io_port6
ora #10h
sta io_port6
sta zp_io_port6
switch_BK 3
lda #80h
sta GPCReg
sta P05
endm
enable_UART macro
switch_BK 2
lda #00100000b
sta TMReg
endm
disable_UART macro
switch_BK 2
lda #0
sta TMReg
endm
CLEAR_BRUI macro
switch_BK 0
lda IVReg
and #0fbh
sta IVReg ;enable uart clock
endm
;;;;;;;;;;;;;;;;;;
enable_UCE macro
switch_BK 0
lda #04h
sta IVReg
endm
disable_UCE macro
switch_BK 0
lda #00h
sta IVReg
endm
clear_FIFO macro
switch_BK 1
lda #30h
sta FCReg
endm
;;;;;;;;;;;;;;;;;;
enable_PLL macro
lda uart_BK
and #0fch
sta uart_BK
lda #4
sta uart_BK
endm
disable_PLL macro
lda uart_BK
and #0fch
sta uart_BK
lda #1
sta uart_BK
lda #23h
sta IRCReg
endm
enable_2Hz macro
lda #10
sta RIReg
lda RTC_IER_map
ora #1
sta RCReg0
sta RTC_IER_map
endm
enable_Alarm macro
lda #10
sta RIReg
lda RTC_IER_map
ora #2
sta RCReg0
sta RTC_IER_map
endm
enable_Samp64 macro
lda #10
sta RIReg
lda RTC_IER_map
ora #70h ; 15.6 ms sample interruption
sta RCReg0
sta RTC_IER_map
endm
enable_Samp1k macro
lda #10
sta RIReg
lda RTC_IER_map
ora #0b0h ; 15.6 ms sample interruption
sta RCReg0
sta RTC_IER_map
endm
disable_2Hz macro
lda #10
sta RIReg
lda RTC_IER_map
and #0feh
sta RCReg0
sta RTC_IER_map
endm
disable_Alarm macro
lda #10
sta RIReg
lda RTC_IER_map
and #0fdh
sta RCReg0
sta RTC_IER_map
endm
disable_Sample macro
lda #10
sta RIReg
lda RTC_IER_map
and #0fh
sta RCReg0
sta RTC_IER_map
endm
clear_2Hz macro
lda #11
sta RIReg
lda #1
sta RCReg1
endm
clear_Alarm macro
lda #11
sta RIReg
lda #2
sta RCReg1
endm
clear_Sample macro
lda #11
sta RIReg
lda #4
sta RCReg1
endm
get_Random macro
lda #4
sta RIReg
lda RTCVal
endm
set_TempByte macro val
lda #val
sta TempByte
endm
send macro local
pha
local: nop
lda LSReg
and #TxRDY
beq local
pla
sta THReg
endm
receive macro local,local1
local: lda LSReg
and #RxRDY
bne local1
lda TimerMark
bne local
local1: lda RHReg
endm
start_flash macro
lda #1
sta IconFlashFlag
endm
stop_flash macro
lda #0
sta IconFlashFlag
endm
;----------------------------------end IrDA macro--------------
;---------------UART & GPIO------------------------
brui equ 3ah
uart_BK equ brui+3
RHReg equ brui
THReg equ brui
LSReg equ brui+1
LCReg equ brui+1
MCReg equ brui+2
IVReg equ brui+3
BSReg equ brui
IRCReg equ brui+1
MSReg equ brui+2
FCReg equ brui+3
CStop equ brui
CStart equ brui+1
TMReg equ brui+2
IEReg equ brui+3
GPCReg equ brui
P05 equ brui+2
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